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Knowledge Cards

Hardware35

  • HardwareAccuracy
    Full name
    Accuracy
    Meaning
    Two senses: compute precision = supported bit-width (e.g. FP32/FP16); model accuracy = how close outputs are to ground truth (e.g. ImageNet top-1).
  • HardwareAMBA
    Full name
    AMBA (AXI/AHB/APB)
    Meaning
    ARM’s on-chip bus spec linking CPU and peripherals: AXI for high-performance (burst, out-of-order), AHB for high-bandwidth subsystems, APB for low-power slow slaves.
  • HardwareBitWidth
    Full name
    Bit Width
    Meaning
    The number of bits per operand (e.g. INT8/FP16/FP32); narrower widths are faster and cheaper but may lose accuracy.
  • HardwareCache
    Full name
    Cache
    Meaning
    A small, fast memory near the CPU caching recent data copies, exploiting locality to speed access; transparent but raises coherency issues on multicore.
  • HardwareCortex-A
    Full name
    ARM Cortex-A
    Meaning
    ARM’s application-processor microarchitecture (ARMv7-A/v8) with MMU and virtual memory, running Linux/Android; distinct from control-oriented Cortex-M.
  • HardwareCPU
    Full name
    Central Processing Unit
    Meaning
    The processor that executes instructions and controls all components, based on the von Neumann architecture; strong at general-purpose, low-latency tasks.
  • HardwareCUDA
    Full name
    Compute Unified Device Architecture
    Meaning
    NVIDIA’s general GPU parallel programming platform; developers write kernels in C/C++ to harness massive GPU parallelism.
  • HardwareDSA
    Full name
    Domain-Specific Architecture
    Meaning
    An accelerator architecture tailored to a domain (e.g. deep learning), far more efficient than general CPUs; NPU/TPU are examples.
  • HardwareeMMC
    Full name
    eMMC
    Meaning
    NAND flash + controller in one soldered BGA package (non-removable), 8-bit parallel half-duplex. Common in phones/budget devices; slower than UFS/NVMe.
  • HardwareEndianness
    Full name
    Endianness
    Meaning
    Byte order of multi-byte data: little-endian puts the low byte at the low address, big-endian the reverse; align it across platforms/networks.
  • HardwareEnergy
    Full name
    Energy
    Meaning
    Energy a chip consumes running AI tasks, shaped by architecture, process, workload and optimization; edge/IoT must trade performance vs efficiency.
  • HardwareFLOPs
    Full name
    Floating Point Operations
    Meaning
    A measure of model compute complexity (e.g. conv FLOPs = 2·H·W·Cin·K·K·Cout), often used as an indirect proxy for network speed and hardware capacity.
  • HardwareGPU
    Full name
    Graphics Processing Unit
    Meaning
    The component for graphics and image processing, packed with parallel ALUs; now also the main accelerator for deep learning and HPC.
  • HardwareLatency
    Full name
    Latency
    Meaning
    The time interval from input entering the chip to the result emerging; autonomous driving demands low inference latency.
  • HardwareLPDDR5
    Full name
    LPDDR5
    Meaning
    A Low-Power DDR SDRAM (JEDEC 2019) for phones/laptops. Independent from DDR5 — same version number, different standard. Peaks at 6400 MT/s, 2× LPDDR4.
  • HardwareMACs
    Full name
    Multiply-Accumulate Operations
    Meaning
    One multiply-accumulate step = one multiply plus one add; conventionally 1 MACs = 2 FLOPs — the basic unit for model and chip compute.
  • HardwareMIPI CSI
    Full name
    MIPI CSI
    Meaning
    The MIPI Alliance camera serial interface linking image sensors/modules to the SoC; the mainstream camera interface in phones and tablets.
  • HardwareMIPI DSI
    Full name
    MIPI DSI
    Meaning
    The MIPI Alliance display serial interface linking the SoC to display panels; the mainstream high-speed screen interface in mobile devices.
  • HardwareMMU
    Full name
    Memory Management Unit
    Meaning
    Hardware translating virtual to physical addresses, enabling task isolation, virtual memory and demand paging — required by Linux-class OSes.
  • HardwareMT/s
    Full name
    MT/s
    Meaning
    Megatransfers per second: effective bus transfers per second. With DDR (data on both clock edges) MT/s exceeds the internal clock MHz; bandwidth = MT/s × width ÷ 8.
  • HardwareNPU
    Full name
    Neural Processing Unit
    Meaning
    A deep-learning-specific processor (DSA) with many AI Cores for efficient MACs, more energy-efficient than general CPUs/GPUs.
  • HardwareNVMe
    Full name
    NVMe SSD
    Meaning
    A PCIe-based SSD interface exploiting low latency and internal parallelism with deep queues and full-duplex, far faster than SATA/AHCI; usually M.2.
  • HardwareOPS
    Full name
    Operations Per Second
    Meaning
    The base unit of compute throughput — operations executed per second; OPS/W extends it to operations per watt.
  • HardwarePipeline
    Full name
    Pipeline
    Meaning
    A RISC technique overlapping fetch/decode/execute of multiple instructions like an assembly line to raise throughput; branches stall it.
  • HardwareProcessor
    Full name
    Processor
    Meaning
    The general term for chips that execute instructions and compute, including CPU, GPU, NPU, DSP — the core of computing devices.
  • HardwareRoofline
    Full name
    Roofline Model
    Meaning
    A performance model: P = min(peak compute, arithmetic intensity × bandwidth), showing whether a workload is compute- or memory-bound.
  • HardwareSIMD
    Full name
    Single Instruction Multiple Data
    Meaning
    One instruction operates on multiple data at once, exploiting data-level parallelism; the basis of CPU vectorization and GPU parallelism.
  • HardwareSIMT
    Full name
    Single Instruction Multiple Threads
    Meaning
    NVIDIA GPU’s execution model: many threads run one instruction with independent contexts — the core abstraction of CUDA programming.
  • HardwareSoC
    Full name
    System on a Chip
    Meaning
    An IC integrating CPU, GPU/NPU, memory controller and peripherals on one chip — the dominant form in phones and embedded devices.
  • HardwareTensor Core
    Full name
    Tensor Core
    Meaning
    NVIDIA GPU units specialized for mixed-precision matrix MACs; one Tensor Core does a 4×4×4 D=A×B+C multiply-add per clock, speeding up deep learning.
  • HardwareThroughput
    Full name
    Throughput
    Meaning
    The amount of data a chip processes per unit time; more cores enable more parallel work and higher throughput.
  • HardwareTOPS
    Full name
    Tera Operations Per Second
    Meaning
    A compute metric where 1 TOPS = 10¹² operations per second; TOPS/W rates operations per watt of power.
  • HardwareTPU
    Full name
    Tensor Processing Unit
    Meaning
    Google’s ML-specific ASIC using systolic arrays and low-precision compute to accelerate matrix math, with several generations plus Edge TPU.
  • HardwareUFS
    Full name
    UFS
    Meaning
    Flash spec for mobiles using MIPI M-PHY serial full-duplex with SCSI command queuing; faster and more scalable than eMMC (UFS 4.0 ≈ 5.8 GB/s).

AI23

  • AIAI Compiler
    Full name
    AI Compiler
    Meaning
    A compiler that turns neural models into efficient low-level code, with frontend graph passes and backend kernel/auto-tuning.
  • AIAscendC
    Full name
    AscendC
    Meaning
    Huawei’s C/C++ operator programming language for Ascend, with vector/matrix/copy APIs to write efficient custom NPU operators.
  • AIAutoDiff
    Full name
    Automatic Differentiation
    Meaning
    How frameworks compute gradients automatically (forward/reverse mode) — the foundation of neural-network training.
  • AICANN
    Full name
    Compute Architecture for Neural Networks
    Meaning
    Huawei Ascend’s software stack bridging frameworks and chips — operator libs, graph engine and runtime, akin to NVIDIA’s CUDA ecosystem.
  • AICompute Graph
    Full name
    Compute Graph
    Meaning
    A graph representing operators and data flow of a network, enabling graph optimization, execution and control flow — the core abstraction of AI frameworks.
  • AIData Parallel
    Full name
    Data Parallelism
    Meaning
    Each device holds the full model and trains on a different data batch — the most common distributed strategy.
  • AIDistillation
    Full name
    Knowledge Distillation
    Meaning
    Training a small "student" under a large "teacher" so the compact model keeps near-teacher quality.
  • AIIm2col
    Full name
    Image to Columns
    Meaning
    Flattens convolution windows into columns to turn conv into a GEMM — a classic trick reusing fast matrix-multiply libraries.
  • AIInference Engine
    Full name
    Inference Engine
    Meaning
    A runtime that deploys trained models and runs inference efficiently on hardware (e.g. MindIE, TensorRT), with conversion, optimization and scheduling.
  • AIIR
    Full name
    Intermediate Representation
    Meaning
    The abstract program form passed between compiler frontend and backend, decoupling optimization from hardware mapping — core to AI compilers.
  • AIMindSpore
    Full name
    MindSpore
    Meaning
    Huawei’s open full-scenario AI framework with device-edge-cloud synergy, unified eager/graph mode and auto-parallel — rival to PyTorch/TensorFlow.
  • AIMixed Precision
    Full name
    Mixed Precision
    Meaning
    Training with FP16/BF16 for forward/backward and FP32 for accumulation — balancing speed, stability and memory.
  • AIMobileNet
    Full name
    MobileNet
    Meaning
    Google’s lightweight CNN family for mobile and embedded vision; depthwise separable convolutions slash params and compute while keeping accuracy and on-device real-time speed.
  • AIModel Compression
    Full name
    Model Compression
    Meaning
    Shrinking model size and compute via quantization, pruning, distillation and binarization for edge/embedded deployment.
  • AIOP Fusion
    Full name
    Operator Fusion
    Meaning
    A frontend pass that merges adjacent operators into one kernel, cutting memory traffic and launch overhead to boost inference.
  • AIPipeline Parallel
    Full name
    Pipeline Parallelism
    Meaning
    Splitting the model by layers across devices and executing micro-batches as a pipeline, raising device utilization for large models.
  • AIPruning
    Full name
    Pruning
    Meaning
    Removing unimportant connections or channels to compress the model and speed inference — one of the model-compression "four essentials".
  • AIQuantization
    Full name
    Quantization
    Meaning
    Mapping weights/activations from high precision (FP32) to low bit-width (INT8 etc.) to shrink storage and compute cost.
  • AIRKNN
    Full name
    Rockchip Neural Network
    Meaning
    Rockchip’s NPU inference toolkit and runtime: RKNN-Toolkit2 converts PyTorch/TensorFlow models to .rknn, then the on-board librknn runtime runs inference efficiently on SoCs like RK356X/RK3588.
  • AIRKNN-Toolkit2
    Full name
    RKNN-Toolkit2
    Meaning
    Rockchip’s official Python toolkit that converts PyTorch/TensorFlow/ONNX models to .rknn, with quantization (INT8/INT4), accuracy evaluation and profiling, then deploys on RK356X/RK3588 NPUs via the on-board librknn runtime.
  • AITensor Parallel
    Full name
    Tensor Parallelism
    Meaning
    Splitting a layer’s weight matrix across devices that compute together, breaking single-card memory and compute limits.
  • AIWinograd
    Full name
    Winograd Convolution
    Meaning
    A convolution-speedup algorithm using polynomial transforms to cut multiplications, notably cheaper for 3×3 convolutions.
  • AIZeRO
    Full name
    Zero Redundancy Optimizer
    Meaning
    Microsoft’s memory-efficient data-parallel technique that shards optimizer/gradient/parameter across devices, removing redundant copies to train huge models.

Programming30

  • ProgrammingArray
    Full name
    Array
    Meaning
    A contiguous sequence of same-type elements accessed by index; an array name often decays to a pointer to its first element.
  • ProgrammingBitwise Op
    Full name
    Bitwise Operation
    Meaning
    Operates on integer bits directly: AND &, OR |, XOR ^, NOT ~, and shifts <<, >> — common in low-level and flag control.
  • ProgrammingC
    Full name
    C Language
    Meaning
    A general-purpose procedural language created by Dennis Ritchie in 1972 — close to hardware yet portable, and the root of C++/Java/Python.
  • ProgrammingClass
    Full name
    Class & Object
    Meaning
    The core of Python OOP: a class templates data and behavior; instances are objects supporting inheritance, encapsulation and polymorphism.
  • ProgrammingComprehension
    Full name
    Comprehension
    Meaning
    Concise syntax building a new sequence from an iterable, e.g. [x*2 for x in xs if x>0] for lists/dicts/sets/generators.
  • ProgrammingControl Flow
    Full name
    Control Flow
    Meaning
    Structures that decide execution order: branches if/else/switch and loops for/while/do-while, plus break/continue/goto jumps.
  • ProgrammingData Type
    Full name
    Data Type
    Meaning
    Defines a variable’s memory layout and allowed operations; C basics include int, char, float, double plus _Bool, _Complex, etc.
  • ProgrammingDecorator
    Full name
    Decorator
    Meaning
    A higher-order construct taking a function and returning a wrapped one; @ syntax adds logging/caching without touching the original.
  • ProgrammingDict
    Full name
    Dictionary
    Meaning
    Python’s key-value mapping (hash table); keys must be hashable and unique, insertion order kept since 3.7, lookup ~O(1).
  • ProgrammingException
    Full name
    Exception
    Meaning
    A runtime error signal; handled with try/except/finally and raised via raise to avoid crashing the program.
  • ProgrammingFile I/O
    Full name
    File Input/Output
    Meaning
    Uses FILE* with fopen/fclose and fscanf/fprintf/fseek to read/write, exchanging data between program and storage.
  • ProgrammingFunction
    Full name
    Function
    Meaning
    A self-contained block with return type, name, parameters and body; returns via return — the basic unit of a C program.
  • ProgrammingHeader File
    Full name
    Header File
    Meaning
    A .h file pulled in via #include, typically holding prototypes, macros and type definitions for modularity and reuse.
  • ProgrammingIterator
    Full name
    Iterator & Generator
    Meaning
    An iterator yields elements one by one; a generator uses yield to produce lazily, saving memory for big or infinite streams.
  • ProgrammingLambda
    Full name
    Lambda
    Meaning
    A single-line anonymous function via lambda, often passed as a callback to sort key, map or filter.
  • ProgrammingList
    Full name
    List
    Meaning
    Python’s mutable sequence — ordered, repeatable, heterogeneous elements with slicing, mutation and comprehensions.
  • ProgrammingMacro
    Full name
    Macro
    Meaning
    A textual substitution rule defined by #define, optionally parameterized; expanded at preprocessing for constants, tiny inline code and portability.
  • ProgrammingMemory Mgmt
    Full name
    Memory Management
    Meaning
    Allocating on the heap with malloc/calloc and freeing with free at runtime; must be paired manually to avoid leaks and dangling pointers.
  • ProgrammingModule
    Full name
    Module & Package
    Meaning
    A module is one .py file; a package is a directory with __init__.py. import reuses code; pip installs third-party packages.
  • ProgrammingPointer
    Full name
    Pointer
    Meaning
    A variable holding a memory address — central to C; enables dereference (*), address-of (&) and pointer arithmetic, underpinning arrays and params.
  • ProgrammingPreprocessor
    Full name
    Preprocessor
    Meaning
    A text-processing stage before compilation: directives like #define, #include, #ifdef/#endif for macro expansion and conditional compilation.
  • ProgrammingPython
    Full name
    Python
    Meaning
    An interpreted, dynamically- and strongly-typed high-level language released by Guido van Rossum in 1991; uses indentation for blocks and has a huge library ecosystem.
  • ProgrammingRegex
    Full name
    Regular Expression
    Meaning
    A pattern language for text rules; the re module matches/searches/substitutes — used for validation, extraction and batch text ops.
  • ProgrammingSet
    Full name
    Set
    Meaning
    Python’s unordered, unique-element mutable container (hash-based), handy for de-dup, membership tests and set algebra.
  • ProgrammingStorage Class
    Full name
    Storage Class
    Meaning
    Attributes deciding a variable’s scope and lifetime: auto, static, extern, register, plus C11’s _Thread_local and _Atomic.
  • ProgrammingString
    Full name
    String
    Meaning
    In C a string is a '\0'-terminated char array; <string.h> offers strlen/strcpy/strcmp and friends.
  • ProgrammingStruct
    Full name
    Structure
    Meaning
    A user type bundling members of different types; access with . (or -> via pointer) — core for organizing complex data.
  • ProgrammingTuple
    Full name
    Tuple
    Meaning
    Python’s immutable sequence, often used to return multiple values from a function and as dictionary keys.
  • ProgrammingUnion
    Full name
    Union
    Meaning
    Like a struct but all members share one memory region, holding one at a time — used to save space or reinterpret bits.
  • ProgrammingVirtual Env
    Full name
    Virtual Environment
    Meaning
    A venv-isolated per-project dependency dir, used with pip to manage package versions and avoid cross-project conflicts.

Embedded32

  • EmbeddedADC
    Full name
    Analog-to-Digital Converter
    Meaning
    A peripheral sampling continuous analog voltage into digital values for sensors; multi-channel ADCs scan channels in turn.
  • EmbeddedAddressing Mode
    Full name
    Addressing Mode
    Meaning
    How an instruction obtains its operands. ARM data-processing uses immediate, register and register-shifted addressing; memory access adds base+offset, pre/post-indexed and block Load/Store modes.
  • EmbeddedARM
    Full name
    ARM Architecture
    Meaning
    A RISC processor architecture by Arm, known for low power and high efficiency, dominant in phones, embedded and servers. Families: Cortex-A (application), Cortex-M (MCU), Cortex-R (real-time); today mainly ARMv8-A 64-bit and ARMv9.
  • EmbeddedARM Exception
    Full name
    ARM Exception
    Meaning
    A mechanism that interrupts the CPU’s normal flow to run a handler. ARM defines 7 exception types, whose entry points live in the vector table.
  • EmbeddedClock Tree
    Full name
    Clock Tree
    Meaning
    An MCU’s hierarchy distributing clocks (via osc/divider/PLL) to peripherals; correct config is required for a stable, working system.
  • EmbeddedCodec
    Full name
    Codec
    Meaning
    An algorithm or hardware block that encodes/decodes audio/video (e.g. H.265 / VP9 / AV1); a hardware codec offloads compression to fixed logic, saving far more power than software — central to multimedia SoCs.
  • EmbeddedCortex-M
    Full name
    ARM Cortex-M
    Meaning
    ARM’s low-power MCU core family (e.g. M3/M4) focused on real-time and efficiency — the compute core of STM32-class MCUs.
  • EmbeddedCP15
    Full name
    CP15
    Meaning
    ARM coprocessor 15 for system control: configures MMU/Cache, memory protection, clocks and exception base. Its c0–c15 registers are reached only via MRC/MCR.
  • EmbeddedCPSR
    Full name
    CPSR
    Meaning
    The ARM status register holding ALU flags, current mode, interrupt enables and processor state; an SPSR backs it up on exception entry.
  • EmbeddedDAC
    Full name
    Digital-to-Analog Converter
    Meaning
    A peripheral turning digital values into analog voltage, used to generate waveforms, audio and other continuous signals.
  • EmbeddedDMA
    Full name
    Direct Memory Access
    Meaning
    A controller moving data between peripherals and memory without CPU involvement, offloading the core and boosting throughput — often with ADC/USART.
  • EmbeddedFIQ/IRQ
    Full name
    FIQ / IRQ
    Meaning
    ARM’s two external interrupt levels: FIQ (higher priority, more banked registers for fast response) and IRQ (normal external interrupt).
  • EmbeddedFirmware Lib
    Full name
    Standard Peripheral Library
    Meaning
    Vendor-supplied peripheral driver libraries (e.g. STM32 SPL) that wrap register ops in APIs, lowering the development barrier.
  • EmbeddedFlash
    Full name
    NOR / NAND Flash
    Meaning
    Non-volatile memory. NOR allows in-place execution and fast random read (code); NAND is denser, page-addressed and cheaper (data/file systems).
  • EmbeddedGPIO
    Full name
    General-Purpose I/O
    Meaning
    Pins configurable in software as input or output, with pull-up/down and alternate functions — the basis for keys, LEDs and more.
  • EmbeddedI2C
    Full name
    I²C Bus
    Meaning
    A 2-wire serial bus (SCL clock, SDA data) where a master addresses slaves; multi-master arbitration supports sensors, EEPROMs and displays.
  • EmbeddedISA
    Full name
    Instruction Set Architecture
    Meaning
    The contract between software and hardware — the instructions, registers and memory model a CPU exposes (e.g. ARMv8, x86, RISC-V); it governs software portability, independent of the microarchitecture.
  • EmbeddedOLED
    Full name
    OLED Display
    Meaning
    A self-emissive dot-matrix display, usually interfaced via SPI/I2C for menus and visualization.
  • EmbeddedPackage
    Full name
    Chip Package
    Meaning
    The process of housing a bare die in a protective shell with pins/balls (e.g. BGA / QFN / LGA); it sets pin count, thermal and solderability traits — as design-critical as the die itself for board layout.
  • EmbeddedPCIe
    Full name
    PCI Express
    Meaning
    The high-speed serial expansion bus on a board (e.g. PCIe 4.0/5.0 ×8/×16) linking CPU to GPUs, NICs, SSDs; bandwidth scales with generation and lane count — a key SoC expandability metric.
  • EmbeddedPeripheral
    Full name
    Peripheral
    Meaning
    On-chip hardware modules for specific tasks (GPIO/TIMER/USART/ADC etc.), configured through registers.
  • EmbeddedProcess Node
    Full name
    Process Node
    Meaning
    The lithography feature size of a chip (e.g. 7nm / 5nm / 3nm), the smallest transistor dimension; smaller nodes generally mean lower power and higher density — a key efficiency metric for SoC selection.
  • EmbeddedPWM
    Full name
    Pulse Width Modulation
    Meaning
    A timer-generated square wave whose duty cycle emulates voltage — common for motor speed, servos and LED dimming.
  • EmbeddedRISC-V
    Full name
    RISC-V
    Meaning
    An open, free, modular RISC ISA started at UC Berkeley. It splits a base integer set (RV32I/RV64I) from optional extensions (M/A/F/D/C…); no license fee and fully customizable, rapidly entering embedded and HPC.
  • EmbeddedRTC
    Full name
    Real-Time Clock
    Meaning
    A clock circuit powered by a slow crystal and backup battery that keeps time during main-power loss, giving date/time and wake-up alarms.
  • EmbeddedSPI
    Full name
    Serial Peripheral Interface
    Meaning
    A fast full-duplex synchronous bus (SCK/MOSI/MISO/SS) for OLED, Flash, etc.; faster than I2C.
  • EmbeddedSTM32
    Full name
    STM32 Microcontroller
    Meaning
    STMicroelectronics’ 32-bit ARM Cortex-M microcontrollers with rich peripherals and mature ecosystem, popular in embedded and IoT.
  • EmbeddedThumb-2
    Full name
    Thumb-2
    Meaning
    ARM’s mixed 16/32-bit instruction set combining Thumb density with ARM performance, no state switching; used by Cortex-M/A/R.
  • EmbeddedTIMER
    Full name
    Timer
    Meaning
    A peripheral that counts to generate timing/interrupts; can output PWM, measure frequency and capture inputs — key to motor control and waveforms.
  • EmbeddedUSART
    Full name
    Universal Synchronous/Asynchronous Receiver-Transmitter
    Meaning
    A serial module supporting sync/async transfer, typically used as UART to talk async with a PC or other modules — a common debug and data interface.
  • EmbeddedWatchdog
    Full name
    Watchdog Timer
    Meaning
    A hardware timer that must be periodically reset (“fed”) by software; if the system hangs, it resets the chip to recover.
  • Embeddedx86
    Full name
    x86 Architecture
    Meaning
    The CISC architecture pioneered by Intel (1978, 8086) and continued by AMD, with strong backward compatibility. Covers 32-bit x86 (IA-32) and 64-bit x86-64 (AMD64); dominant in desktops, laptops and servers, contrasting ARM’s efficiency focus.

Robotics27

  • RoboticsAction
    Full name
    Action
    Meaning
    The third ROS communication primitive: like a service but the server streams feedback and the client can cancel — for long tasks like navigation. ROS 1 uses actionlib; ROS 2 has it natively.
  • RoboticsDDS
    Full name
    Data Distribution Service
    Meaning
    The real-time pub/sub middleware standard under ROS 2, providing discovery, QoS and cross-language transport.
  • RoboticsDepth Camera
    Full name
    Depth Camera
    Meaning
    A camera that also outputs per-pixel depth (e.g. RGB-D, ToF, structured light), used for obstacle avoidance, grasping and 3D reconstruction.
  • RoboticsDynamic Reconfigure
    Full name
    Dynamic Reconfigure
    Meaning
    A ROS 1 mechanism to tune parameters at runtime (e.g. PID gains, filter coeffs) without restarting nodes, fixing the parameter server’s start-time-only limit; ROS 2 uses parameter events instead.
  • RoboticsGazebo
    Full name
    Gazebo
    Meaning
    An open 3D physics simulator that loads URDF robots and emulates sensors and dynamics — for testing algorithms without real hardware.
  • RoboticsInterface
    Full name
    Communication Interface
    Meaning
    Files defining message structure: .msg (topic), .srv (service), .action (action) — the contract for node data exchange.
  • RoboticsLiDAR
    Full name
    Light Detection and Ranging
    Meaning
    A sensor emitting laser and measuring return time/phase to get distance, building 3D point clouds — core to robot and autonomous perception.
  • Roboticsmicro-ROS
    Full name
    micro-ROS
    Meaning
    A lightweight ROS 2 client for MCUs (e.g. STM32), letting embedded devices join the ROS 2 network as nodes.
  • RoboticsMoveIt
    Full name
    MoveIt
    Meaning
    The ROS framework for manipulator motion planning: kinematics, path planning, collision checking, grasping and execution management for robot arms.
  • RoboticsNode
    Full name
    Node
    Meaning
    A ROS 2 process with one responsibility — the basic unit of computation; a robot is a set of communicating nodes.
  • RoboticsNodelet
    Full name
    Nodelet
    Meaning
    A ROS 1 mechanism running multiple nodes in one process with zero-copy intra-process messages, avoiding TCP overhead for high-bandwidth (e.g. image) data; ROS 2 uses component containers instead.
  • RoboticsPackage
    Full name
    Package
    Meaning
    The basic unit organizing ROS 2 code (source, config, deps), built by Colcon — the smallest distributable software module.
  • RoboticsParameter
    Full name
    Parameter
    Meaning
    A node’s runtime-readable/writable config values (a global dictionary) to tune behavior without code changes.
  • Roboticspluginlib
    Full name
    pluginlib
    Meaning
    A ROS 1 C++ library to dynamically load/unload plugins (classes) from packages at runtime without compile-time linking — easing algorithm and module extension.
  • RoboticsQoS
    Full name
    Quality of Service
    Meaning
    DDS communication policies (history, reliability, liveliness…) controlling delivery guarantees and resource use; both ends must be compatible.
  • RoboticsROS2
    Full name
    Robot Operating System 2
    Meaning
    A distributed robotics framework built on DDS, with real-time, multi-language and cross-platform support — the rebuilt successor to ROS.
  • Roboticsrosbag
    Full name
    rosbag
    Meaning
    The ROS message record/replay tool: writes topic data to a .bag file for offline debugging, reproducible tests and data replay; available in ROS 1 and 2.
  • Roboticsrqt
    Full name
    rqt
    Meaning
    A Qt-based ROS GUI framework offering topic monitors, node graphs, log viewers and parameter editors as plugins, replacing scattered legacy ROS tools.
  • RoboticsRViz
    Full name
    RViz
    Meaning
    ROS’s 3D visualization tool showing robot models, frames, point clouds, maps and topic data for debugging and inspection.
  • RoboticsService
    Full name
    Service
    Meaning
    Sync request/response communication: a client calls, a server replies — suited to occasional, confirmed tasks.
  • RoboticsSLAM
    Full name
    Simultaneous Localization and Mapping
    Meaning
    A robot estimating its pose while building a map in an unknown environment — the prerequisite of autonomous navigation.
  • RoboticsTF
    Full name
    Transform
    Meaning
    A tool tracking transforms between robot coordinate frames, publishing/querying relative poses — the basis of localization and perception.
  • RoboticsTopic
    Full name
    Topic
    Meaning
    Async pub/sub communication: publishers broadcast messages, subscribers receive — ideal for one-to-many streaming data like sensors.
  • RoboticsURDF
    Full name
    Unified Robot Description Format
    Meaning
    An XML format describing links, joints, collision and visual geometry; parsed by RViz and Gazebo for display and simulation.
  • RoboticsWorkspace
    Full name
    Workspace
    Meaning
    A Colcon-managed directory gathering packages for unified build/install — the root environment of a ROS 2 project.
  • RoboticsXacro
    Full name
    Xacro
    Meaning
    A macro language extending URDF with variables, constants and reuse, simplifying long, repetitive robot models.
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